MCU/MPU Semiconductor Engineer M/F
Permanent contract
Karnataka, India
18 Mar 2024
Job Description:
Provide technical expertise in MCU/MPU Internal Architecture to maximize the ECU Hardware design efficiency/performance in the areas of Body, Gateway, ADAS and Infotainment
Work proactively with silicon vendor partners to drive design features and solutions.
Provide technical expertise for ARM, RISC-V, HW accelerations, embedded memory
Provide technical expertise for the best-in-class ISO26262 and Cyber security implementations
Support HW Engineering group during advanced design phases, system architecture definitions and ECU development / Qualifications
Support discussions between the organization between the HW Engineering and the Semiconductor groups for High level MCU/MPU specifications
Support MCU/MPU roadmap definitions by regularly providing survey study of relevant industry technologies and SoC solutions
Collaborate in a Scaled Agile product delivery team, comprised of cross-functional company peers to continuously prioritize, refine, and deploy component
Basic Qualifications :
BS or MS in Electrical or Computer Engineering
Experience in Silicon MCU/MPU Design for embedded electronics or mixed experience of design, chip architecture, and TIER2 AE/FAE role
Experience in EE architecture topologies, software architecture, Functional safety
Track record of first-pass success in ASIC development
Strong teamwork spirit; excellent oral and written communication skills; ability to work independently in a global team environment.
Familiar with Silicon Design suite tools
Preferred Qualifications:
Experienced in industrial or automotive (preferred) area
Justified experience in ARM 32/64bits architecture, power management, high speed interfaces, memories, data networking (ETH, Can, LIN...)
Experience in defining micro-architecture specifications
Experience in RISC-V architecture, HW segregation, hypervisor technologies is a plus
Familiar with 3rd party IPs and design integration
Solid understanding of embedded electronics design constraints at the component and system level
Job Description:
Provide technical expertise in MCU/MPU Internal Architecture to maximize the ECU Hardware design efficiency/performance in the areas of Body, Gateway, ADAS and Infotainment
Work proactively with silicon vendor partners to drive design features and solutions.
Provide technical expertise for ARM, RISC-V, HW accelerations, embedded memory
Provide technical expertise for the best-in-class ISO26262 and Cyber security implementations
Support HW Engineering group during advanced design phases, system architecture definitions and ECU development / Qualifications
Support discussions between the organization between the HW Engineering and the Semiconductor groups for High level MCU/MPU specifications
Support MCU/MPU roadmap definitions by regularly providing survey study of relevant industry technologies and SoC solutions
Collaborate in a Scaled Agile product delivery team, comprised of cross-functional company peers to continuously prioritize, refine, and deploy component
Basic Qualifications :
BS or MS in Electrical or Computer Engineering
Experience in Silicon MCU/MPU Design for embedded electronics or mixed experience of design, chip architecture, and TIER2 AE/FAE role
Experience in EE architecture topologies, software architecture, Functional safety
Track record of first-pass success in ASIC development
Strong teamwork spirit; excellent oral and written communication skills; ability to work independently in a global team environment.
Familiar with Silicon Design suite tools
Preferred Qualifications:
Experienced in industrial or automotive (preferred) area
Justified experience in ARM 32/64bits architecture, power management, high speed interfaces, memories, data networking (ETH, Can, LIN...)
Experience in defining micro-architecture specifications
Experience in RISC-V architecture, HW segregation, hypervisor technologies is a plus
Familiar with 3rd party IPs and design integration
Solid understanding of embedded electronics design constraints at the component and system level